<div class="content-intro"><p data-renderer-start-pos="41">K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.</p> <p data-renderer-start-pos="570">The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.</p> <p data-renderer-start-pos="994">With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.</p></div><p><strong><span data-contrast="auto">About the Role</span></strong> <br><span data-contrast="auto">We are looking for a hands-on Senior Mixed-Signal Post-Silicon Validation Engineer to bring up and characterize complex mixed-signal SoCs from first silicon through product integration.</span> <br><span data-contrast="auto">You will work closely with analog/mixed-signal designers, systems/DSP, firmware, FPGA, digital, and hardware teams to validate silicon performance, debug issues, and build our test and validation capability from the ground up.</span></p> <p><strong><span data-contrast="auto">Responsibilities</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li><span data-contrast="auto">Bring up and characterize mixed-signal silicon, including ADCs, DACs, PLLs, clocking, references, power, and analog signal paths.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Develop and execute characterization plans across frequency, voltage, temperature, process, and operating modes.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Measure key converter and analog performance including SNDR, SFDR, ENOB, INL/DNL, noise, bandwidth, jitter, phase noise, linearity, and power.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Develop automated test setups for characterization, regression, data collection, analysis, and reporting.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Work closely with analog/mixed-signal designers to correlate silicon measurements with simulations and identify performance gaps.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Partner with systems/DSP teams to validate DSP and calibration algorithms on silicon and correlate results with system models.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Debug complex issues spanning silicon, firmware, package, PCB, test setup, and system behavior.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Support the transition from chip-level validation to product integration and system-level testing.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Contribute to building the validation lab, test infrastructure, measurement methodology, and automation from the ground up.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Document characterization results, silicon limitations, workarounds, and lessons learned for future silicon generations.</span><span data-ccp-props="{"335559739":0}"> </span></li> </ul> <p><strong><span data-contrast="auto">Qualifications</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li><span data-contrast="auto">BS/MS in Electrical Engineering or related field.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">5+ years of mixed-signal silicon validation, characterization, product engineering, or related experience.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Strong understanding of ADC, DAC, PLL, clocking, and analog circuit fundamentals.</span><span data-ccp-props="{"335559739":0}"> </span></li> <li><span data-contrast="auto">Deep hands-on experience with lab test equipment such as high-speed oscilloscopes, spectrum/signal analyzers, vector signal generators, phase-noise analyzers, network analyzers, power supplies, and related mixed-signal instrumentation.</span><span data-ccp-props="{"335559739":0}">