chaosindustries · El Segundo, California, United States · Los Angeles, California, United States
<p>CHAOS Industries is redefining modern defense with a multi-product portfolio that gives the ultimate advantage—domain dominance. The company's products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. </p> <p>CHAOS Industries was founded in 2022 and has raised a total of $1 billion in funding from leading investors, including 8VC, Accel, and Valor Equity Partners. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, San Diego, Seattle, and London. For more information, please visit <a href="https://www.chaosinc.com">www.chaosinc.com</a>.</p> <p><strong><span data-contrast="auto">Role Overview:</span></strong><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":120,"335559740":240}"> </span></p> <p><span data-contrast="auto">CHAOS is seeking a Senior Staff Electrical Engineer with expertise in digital circuit design and signal integrity analysis to provide senior technical leadership for high-reliability digital electronics used in aerospace and military applications. This role spans the full product lifecycle, from early architecture and requirements shaping through detailed design, analysis, verification, production support, and fielded system sustainment.</span><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":120,"335559740":240}"> </span></p> <p><span data-contrast="auto">The ideal candidate is an experienced digital hardware technical leader with deep high-speed board design, signal integrity, and power integrity expertise; a track record of leading complex designs and influencing technical direction; and the ability to guide cross-disciplinary teams through ambiguous, high-consequence hardware challenges.</span><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":120,"335559740":240}"> </span></p> <p><span data-contrast="auto">This is a full-time, on-site position in El Segundo, CA.</span><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":120,"335559740":240}"> </span></p> <p> <br><strong><span data-contrast="auto">Responsibilities:</span></strong><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":120,"335559740":240}"> </span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="6" data-list-defn-props="{"335552541":1,"335559685":1080,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">Lead the design and technical execution of high-speed digital circuit cards and subsystems in accordance with customer requirements, applicable aerospace and military standards, and internal design practices</span><span data-ccp-props="{"201341983":0,"335557856":16777215,"335559739":120,"335559740":240}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="6" data-list-defn-props="{"335552541":1,"335559685":1080,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="auto">Lead design and review of complex PCBAs involving FPGAs, processors, memory devices, data converters, clocks, high-speed serial interfaces, and mixed-signal boundaries</span><span data-ccp-props="{"201341983":0,"335557856":16777215,"335559739":120,"335559740":240}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="6" data-list-defn-props="{"335552541":1,"335559685":1080,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="3" data-aria-level="1"><span data-contrast="auto">Lead digital hardware architecture trades and define design approaches that balance system performance, schedule, manufacturability, reliability, and qualification requirements</span><span data-ccp-props="{"201341983":0,"335557856":16777215,"335559739":120,"335559740":240}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="6" data-list-defn-props="{"335552541":1,"335559685":1080,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="4" data-aria-level="1"><span data-contrast="auto">Develop and promote design practices for digital board design, stack-up definition, layout constraints, SI/PI analysis, bring-up, and verification within assigned product areas</span><span data-ccp-props="{"201341983":0,"335557856":16777215,"335559739":120,"335559740":240}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="6" data-list-defn-props="{"335552541":1,"335559685":1080,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="5" data-aria-level="1"><span data-contrast="auto">Resolve complex cross-disciplinary technical issues involving digital hardware, FPGA/software interfaces, RF coexistence, power distribution, EMI/EMC, thermal behavior, and mechanical packaging</span><span data-ccp-props="{"201341983":0,"335557856":16777215,"335559739":120,"335559740":240}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symb