FPGA Engineer (New Grad Summer 2027)

<h2 id="Senior-Mechanical-Engineer" data-renderer-start-pos="9649">FPGA ENGINEER (NEW GRAD SUMMER 2027)</h2> <p><span data-contrast="auto">Freeform builds AI-native manufacturing systems that unify software, hardware, and physics to produce industrial-scale parts at the speed of human ideation. By treating manufacturing as a single integrated system, we unlock a new era of innovation where complex hardware is designed, built, and scaled without limits. </span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-contrast="auto">As an FPGA Engineer at Freeform, you will play a key role in developing and deploying the software systems that power our autonomous metal 3D printing factories. </span><span data-contrast="none">You’ll work with a talented engineering team from some of the world’s most innovative companies across a range of projects</span><span data-contrast="auto"> including controls, high-speed data acquisition, high-performance computing (GPU’s and FPGA’s), and geometry processing pipelines that enable precise and fully automated manufacturing at scale. Your work will directly impact the performance, reliability, and scalability of our factory systems. The ideal candidate thrives in ambiguity, takes initiative on complex technical problems, and works collaboratively across disciplines to deliver robust, high-performance software solutions. This is an opportunity to build foundational systems for a new category of manufacturing technology - where your code doesn’t just run, it drives physical innovation.</span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"> </span></p> <p><span data-contrast="auto">3D printing experience is not required to be successful here - rather we look for smart, motivated, collaborative engineers who love solving hard problems and creating amazing technology!</span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"> </span></p> <p><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"><iframe src="https://www.youtube.com/embed/sXfG6ssZ190?feature=shared" width="560" height="315"></iframe></span></p> <p><strong><span data-contrast="auto">Responsibilities:</span></strong><span data-contrast="auto"> </span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"> </span></p> <ul> <li><span data-contrast="auto">Developing new logic components for use on FPGAs</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Implementing custom algorithms on FPGAs for signal processing</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Implementing custom controllers on FPGAs</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Working with other software engineers to develop embedded Linux applications to interface with FPGA logic components</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Packaging and using IP components in FPGA block diagram design</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Working both on development boards and in a production environment</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> </ul> <p><strong><span data-contrast="auto">Basic Qualifications:</span></strong><span data-contrast="auto"> </span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"> </span></p> <ul> <li><span data-contrast="auto">Bachelor's degree in computer engineering, electrical engineering, or computer science </span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Hands on electrical experience from internships or engineering clubs such as FSAE, Baja SAE, solar car, rocket club, robotics club, or similar</span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335551550":1,"335551620":1,"335559737":0,"335559738":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Experience developing in VHDL or Verilog</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> </ul> <p><strong><span data-contrast="auto">Nice to Have:</span></strong><span data-contrast="auto"> </span><span data-ccp-props="{"134233117":false,"134233118":false,"335559738":240,"335559739":240}"> </span></p> <ul> <li><span data-contrast="auto">Experience with Xilinx Zynq Ultrascale+ MPSoC</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <li><span data-contrast="auto">Familiarity with Xilinx Vivado/Vitis toolchain development environment</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li> <