๐ง๐ต๐ถ๐ ๐ฟ๐ผ๐น๐ฒ ๐ถ๐ ๐ณ๐ผ๐ฟ ๐ผ๐ป๐ฒ ๐ผ๐ณ ๐๐ต๐ฒ ๐ช๐ฒ๐ฒ๐ธ๐ฑ๐ฎ๐'๐ ๐ฐ๐น๐ถ๐ฒ๐ป๐๐ ๐ฆ๐ฎ๐น๐ฎ๐ฟ๐ ๐ฟ๐ฎ๐ป๐ด๐ฒ: ๐ฅ๐ ๐ญ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ - ๐ฅ๐ ๐ฏ๐ฑ๐ฌ๐ฌ๐ฌ๐ฌ๐ฌ (๐ถ๐ฒ ๐๐ก๐ฅ ๐ญ๐ฑ-๐ฏ๐ฑ ๐๐ฃ๐) Experience: 3+ yrs Location: Bengaluru, Karnataka, India, Hyderabad, Telangana, India We are looking for a skilled Analog Circuit Design Engineer with hands-on experience in analog and mixed-signal integrated circuit design. The ideal candidate will have strong technical expertise in Phase-Locked Loops (PLL), SerDes, FinFET technologies, and physical verification processes, including Layout Versus Schematic (LVS) and Design Rule Checks (DRC). This role involves designing, analysing, verifying, and optimising high-performance circuits for advanced semiconductor applications. You will collaborate with cross-functional engineering teams to develop robust, power-efficient, and high-speed circuit solutions while ensuring design accuracy, reliability, and compliance with technology-specific requirements. Requirements Key Responsibilities โข Design, analyse, and optimise analog and mixed-signal circuits for advanced semiconductor applications. โข Develop and verify PLL circuits, focusing on frequency generation, clocking performance, stability, and jitter characteristics. โข Contribute to SerDes circuit design for high-speed data transmission and signal integrity. โข Perform transistor-level circuit simulations and analyse performance across process, voltage, and temperature (PVT) variations. โข Work with FinFET technology and understand its impact on circuit behaviour, power consumption, and performance. โข Collaborate with layout engineers to ensure accurate implementation of circuit designs. โข Perform and debug LVS and DRC checks, resolving schematic-to-layout mismatches and design rule violations. โข Support post-layout simulation, parasitic analysis, and circuit performance optimisation. โข Investigate circuit functionality, timing, noise, power, and reliability issues. โข Participate in design reviews and collaborate with cross-functional engineering teams. โข Maintain design documentation, simulation results, verification reports, and technical specifications. โข Follow established semiconductor design methodologies, verification standards, and quality practices. What Makes You a Great Fit โข 3+ years of experience in analog or mixed-signal integrated circuit design. โข Strong understanding of analog circuit fundamentals, transistor-level design, and semiconductor device characteristics. โข Hands-on experience with PLL design and/or SerDes circuit development. โข Knowledge of FinFET process technologies and advanced-node semiconductor design considerations. โข Practical experience with LVS, DRC, and physical verification workflows. โข Familiarity with circuit simulation tools such as Cadence Virtuoso, Spectre, or HSPICE. โข Understanding of PVT analysis, post-layout simulation, parasitic effects, and circuit optimisation. โข Strong debugging, analytical, and problem-solving skills. โข Ability to collaborate effectively with circuit design, layout, and verification teams. โข A Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, VLSI, or a related discipline is preferred.