<div class="content-intro"><p data-renderer-start-pos="41">K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by over $1 billion in total funding from leading investors including Altimeter Capital, ICONIQ, Kleiner Perkins, Lightspeed Venture Partners, Redpoint Ventures, and T. Rowe Price — and with over $1 billion in signed contracts across commercial and US government customers, we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.</p> <p data-renderer-start-pos="570">The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.</p> <p data-renderer-start-pos="994">With multiple launches in 2027 and plans to scale to 100 satellites a year, we're Building Bigger — helping develop the solar system and build toward a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a high-growth Series D-funded company, we'd love for you to apply.</p></div><p><strong><span data-contrast="auto">The Role</span></strong><span data-ccp-props="{"335559738":240,"335559739":240}"> </span></p> <p><span data-contrast="none">K2's ambitions extend beyond the satellite bus. By designing and operating our own spacecraft and regularly manifesting hardware to orbit, K2 is uniquely positioned to develop, test, and deploy ambitious, “limit-of-physics” optical and photonic payloads across MEO, GEO, cislunar, and deep space on unprecedented timelines. The satellite bus is the platform – the payloads are the mission.</span><span data-ccp-props="{"335559738":240,"335559739":240}"> </span></p> <p><span data-contrast="none">As a Photonic IC Design Engineer focused on design automation and modeling, you will own the team's photonic design flow: the software that takes a requirement to a fabrication-ready, DRC-clean design whose measured performance matches simulation. Inverse design and AI-guided design are core parts of that flow, alongside parametric layout generation, fabrication-aware models, and automated verification. You will build the tools, the component library, and the models the whole team designs with (and that our tunable circuits are calibrated and controlled with in operation), and work closely with the test and automation team so every design is built for test and every measurement flows back into the models. You will also own real device blocks on the team's product tapeouts and take them from design through lab measurement, so the flow is proven on parts that ship. As a founding member of the photonics team, you will help set the tools and design practices the team grows on.</span><span data-ccp-props="{"335559738":240,"335559739":240}"> </span></p> <p><strong><span data-contrast="auto">Responsibilities</span></strong><span data-ccp-props="{"335559738":240,"335559739":240}"> </span></p> <ul> <li><span data-contrast="auto">Own the team's photonic design automation flow: parametric layout generation, simulation orchestration, design-space exploration, and automated DRC/LVS and sign-off across multiple integrated photonics foundry platforms (e.g., silicon, silicon nitride, III-V).</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Build and maintain fabrication-aware inverse design (topology optimization in JAX or PyTorch, with lithography models and robustness to process variation) as a core engine of the flow.</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Bring agentic and AI-guided tools into the design loop for design-space exploration, layout generation, optimization, and data analysis.</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Own device and circuit blocks on product PICs from specification through tapeout and characterization, on the team's tapeout schedule (e.g., polarization handling, low-loss routing, mode converters, vertical couplers for 3D integration, and wideband devices).</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Partner with the photonics test and automation team on characterization: build design-for-test into the flow (test structures, probe- and fiber-array-compatible layouts), define measurement plans and metrics, and connect the flow to the shared test data pipeline.</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Characterize your devices in the lab and on the test team's automated stations (insertion loss, extinction, bandwidth, high-speed electro-optic response), treat simulation-to-measurement error as your key metric, and turn the data into model calibrations, design rules, and flow updates.</span><span data-ccp-props="{"335559738":220,"335559739":220}"> </span></li> <li><span data-contrast="auto">Maintain pcells and compact models for the team's component library, with regres